Permanent
Bangalore
Posted 3 months ago
- Minimum 2+ Years of Experience in Physical Design
- Block Level P&R / Sub-system Level P&R/ Tile Level P&R.
- Experienced in Cadence (EDI) or Synopsys (ICC) and Mentor (Calibre) EDA Tools.
- Process node experience to be in the range of 40nm & below (i.e. 28 nm, 16 nm, 10
- nm,5nm,3nm).
- Responsible for full chip implementation of complex SoCs (RTL-to-GDSII)
- Good Leadership skills and people management skills.
Job Features
| Job Category | Physical design Engineer |
| Job Code | ICD-PDE-011 |
| Qualification | B.E or M.Tech in Electronics / VLSI Engineering |
| Experience | 2-20 Years |